Introduction

I’m honored to contribute my first editorial to The Reflector. I’m grateful to IEEE President Kathleen Kramer for appointing me to membership development roles in both IEEE Region 1 and the IEEE Boston Section. This led to me joining the Executive Committee, which I’m thoroughly enjoying and I highly recommend IEEE volunteering activities!

The timing for this piece couldn’t be better. The IEEE High Performance Extreme Computing (HPEC) Conference is just around the corner (September 15-19). Registration will remain open throughout the conference—check it out at: https://ieee-hpec.org

HPEC’s Unique Mission

IEEE HPEC’s mission is simple but bold: advance the art and science of extreme computing in support of academic, government, and commercial needs. It focuses on performance at every level; from single-chip innovations to global-scale infrastructure, from theory to implementation, and from training AI models to deploying them on the edge.

Unlike other major computing conferences, HPEC prioritizes broadening the field. HPEC’s peer-review philosophy focuses on accepting all qualified papers to ensure that strong, relevant work, especially from students, early-career researchers, and interdisciplinary teams, gets the attention it deserves.

Virtual by Design, Not Just by Necessity

HPEC went fully virtual in 2020, but not just as a stopgap. According to IEEE Senior Member Dr. Jeremy Kepner, the shift was already under discussion before the pandemic. Once the opportunity emerged, the team committed early, communicated clearly, and built a custom infrastructure to support a virtual-first future.

This strategic pivot paid off: submissions surged, registration costs were cut in half, and participation expanded dramatically across geographic and institutional boundaries. Attendance per session now averages 70–150, compared to 20–25 in the in-person era, and 2025 saw a record number of paper submissions. HPEC runs five days of sequential, high-tempo programming, with each session as its own event, optimized for short attention spans and global time zones, further enhancing accessibility.

Importantly, HPEC has full archival proceedings in IEEE Xplore, but HPEC is not recorded. As Dr. Kepner puts it, “We treat it like live theater.” This encourages spontaneity, minimizes speaker concerns about recordings, and allows post-session breakout rooms for deeper conversations to virtually recreate the hallway chats and Q&A clusters that give conferences life. Building on this success, HPEC doubled down on another core value: accessibility.

Accessibility as a Core Value

Accessibility is more than a buzzword, it’s HPEC’s design principle. Virtual participation allows those with family obligations, physical limitations, or travel restrictions to engage deeply without leaving home. Many attend only the sessions most relevant to them, a flexibility that’s rare in traditional formats. And thanks to support from corporate sponsors and IEEE Boston Section, complimentary registration is available to many non-authors. This creates a virtuous cycle: greater accessibility brings broader participation, richer discussions, and more visibility for accepted work.

“Accessibility is everything to us,” said Dr. Kepner. “The number of people who see each presentation has dramatically increased. Our goal is to grow the field and that means lowering barriers for everyone interested in extreme computing.”

For other IEEE Sections or organizers considering hybrid or virtual futures, the HPEC model is a strong case study. It leverages a suite of tools (including Zoom, Cvent, Microsoft CMT, Engagez, and in-house automation) to provide a seamless integrated experience for chairs, presenters, and especially attendees. IEEE Senior Member Dr. Albert Reuther added, “The custom automation and integration of the suite of tools enables us to go from paper submission, through the review process and paper updates, to presentations during the conference week in about two months, this enables researchers to present and share results with the community in a very timely manner.”

HPEC’s success stems from continuity, trust, and the strategic vision of a stable team that includes not just Kepner and Reuther, but IEEE Boston Section Business Manager Trina Lorigan; former IEEE Boston Section Business Manager Bob Alongi; IEEE Boston Section Office Manager Karen Safina; and web developer Kathleen Ballos, whose years of support have made consistent delivery possible.

A Home for Cutting-Edge Work

Because of the world-leading nature of today’s supercomputing platforms, much of the work being done on them is publishable in IEEE HPEC. The conference provides a convenient, rapid, and archival venue for innovations that span theory, systems, and applications. Topics include:

• High Performance Computing and Supercomputing
• Artificial Intelligence, Machine Learning, and Generative AI
• Large Language Models, CNNs, DNNs, and Edge Inference
• Big Data, Distributed Computing, and Graph Analytics
• General-Purpose GPUs and Quantum/Hybrid Architectures
• Cybersecurity, Secure Systems, and Fault Tolerance
• Embedded, Real-Time, and Mixed-Precision Computing
• Benchmarking, AI for Performance Optimization, and Multicore Software

Distinguished Speakers and Community-Led Sessions

HPEC attracts outstanding invited speakers each year, including luminaries from MIT, NVIDIA, Intel, Microsoft, Federal Laboratories, and abroad. Recent talks have covered safe autonomy, biodiversity AI, privacy-preserving analytics, and optimization for mobility and energy.

Equally compelling are the special topic sessions organized by the community. These have included:

• GenAI Opportunities and AI Challenges
• Bridging Quantum and High-Performance Computing
• Age of Mixed Precision
• MIT/Amazon/IEEE Graph Challenge
• BRAINS: Building Resilience through AI for Networked Systems
• GraphBLAS Forum
• Scaling Research Computing Education

A Boston Section Success Story

Although HPEC is globally attended, it is deeply rooted in the IEEE Boston Section. Launched over 25 years ago as an MIT Lincoln Laboratory workshop, it joined the Boston Section officially over a decade ago. That partnership has yielded a powerful blend of local continuity and global influence.

Boston Section members play vital roles as authors, reviewers, chairs, and attendees. You can take pride in HPEC’s impact. Boston section members are encouraged to attend and support the conference by:

• Submitting work from your lab, startup, or university
• Encouraging students to attend and present
• Citing HPEC publications in your work
• Spreading the word to colleagues and collaborators

Looking Ahead

The next IEEE HPEC Conference will be held virtually from September 15–19, 2025. Information on registration, submissions, and special sessions is at https://ieee-hpec.org/. Paper submissions typically open in March and close in July, with reviews in August.

As AI, HPC, and embedded computing continue to converge, HPEC provides a forum that’s timely, accessible, and impactful. It exemplifies what’s possible when IEEE Sections embrace the future and invest in the long game.

Whether you’re presenting new results, mentoring junior researchers, or exploring cutting-edge platforms, I invite you to engage with IEEE HPEC. Join us this September to discover where performance meets purpose at HPEC!

 

Joseph Campbell

Dr. Joseph P. Campbell, an IEEE Life Fellow, is a Laboratory Fellow at MIT Lincoln Laboratory (MIT LL) specializing in artificial intelligence technologies for national security. Since joining MIT LL in 2001, he has led groups advancing human language technology, deep learning for cyber analytics, and operational evaluation methods, delivering significant mission impact for U.S. government applications. His leadership has extended to major programs in forensic speaker recognition, biometrics, big data analytics, and technologies for combating human trafficking, with innovations transitioned to operational use by the U.S. government.

An active IEEE volunteer, Dr. Campbell has served as a distinguished lecturer, editor, and officer in multiple IEEE roles, and currently co-chairs MIT LL’s Professional Societies Committee. He has authored more than 120 publications with over 8,000 citations, holds a U.S. patent, and has led multiple U.S. Federal and NATO speech-coding standards. His technical leadership has been recognized with MIT LL’s highest honor, the Technical Excellence Award, and numerous national awards in biometrics and speech processing.

Dr. Campbell earned his BS, MS, and PhD in electrical engineering from Rensselaer Polytechnic Institute, Johns Hopkins University, and Oklahoma State University, respectively.

Jeremy Kepner

Dr. Jeremy Kepner is an MIT Lincoln Laboratory Fellow. He founded the Lincoln Laboratory Supercomputing Center and pioneered the establishment of the Massachusetts Green High Performance Computing Center. He has developed novel big data and parallel computing software used by thousands of scientists and engineers worldwide. He has led several embedded computing efforts, which earned him a 2011 R&D 100 Award. Kepner has chaired the SIAM Data Mining conference, the IEEE Big Data conference, and the IEEE High Performance Extreme Computing conference. Kepner is the author of three books, Parallel MATLAB for Multicore and Multinode Computers, Graph Algorithms in the Language of Linear Algebra, and Mathematics of Big Data. His peer-reviewed publications include works on abstract algebra, astronomy, astrophysics, cloud computing, cybersecurity, data mining, databases, graph algorithms, health sciences, plasma physics, signal processing, and 3D visualization. In 2014, he received Lincoln Laboratory’s Technical Excellence Award.

Kepner holds a BA degree in astrophysics from Pomona College and a PhD degree in astrophysics from Princeton University.

Albert Reuther

Dr. Albert Reuther is a senior staff member in the MIT Lincoln Laboratory Supercomputing Center (LLSC). He brought supercomputing to Lincoln Laboratory through the establishment of LLGrid, founded the LLSC, and leads the LLSC Computational Science and Engineering team. He developed the gridMatlab high-performance computing (HPC) cluster toolbox for pMatlab and is the computer system architect of the MIT Supercloud and numerous interactive supercomputing clusters based on Supercloud, including those in the LLSC.

As a computational engineer, he has worked with many teams within the Laboratory and beyond to develop efficient parallel and distributed algorithms to solve a wide array of computational problems. The Supercloud architecture earned him an Eaton Award for Design Excellence and his computational engineering work earned him a 2017 R&D 100 Award. He is the technical chair of the IEEE High Performance Extreme Computing Conference and has organized numerous workshops on interactive HPC, cloud HPC, economics of HPC, and HPC security. His areas of research include interactive HPC; computer architectures for machine learning, graph analytics, and parallel signal processing; and computational engineering.

Reuther earned BS, MS, and PhD degrees in computer and electrical engineering from Purdue University and an MBA degree from the Collège des Ingénieurs in Paris, France, and Stuttgart, Germany.

 

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This material is based upon work supported by the Department of the Air Force under Air Force Contract No. FA8702-15-D-0001 or FA8702-25-D-B002. Any opinions, findings, conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the Department of the Air Force.