Electronic Reliability Tutorial Series 1
Electronic Reliability Tutorial Series 1 On-Demand:
Electronic Failures and Mitigation Methods from a Component, Design and Process Perspective- These tutorials are available on demand.
- This series contains 5 tutorials.
- You have 180 days to access each tutorial.
- Registration Fee: $70.00 for each tutorial.
Electronics perform critical functions in every major industry vertical, whether in automotive, aerospace, consumer, medical or industrial segments. With the advent of newer technologies (both at the component and material levels), shrinkage of feature sizes, more stringent environments and sophisticated power requirements, electronics face increasing reliability risks. Supply chain trends have changed over the years from a vertically integrated model to a more geographically diverse supply chain. All these trends have increased reliability risks for companies. However, the cost of reliability assurance activities is often a fraction of the cost of failure, with compounding benefits from conducting these activities early in the design process.
This set of five tutorials brings together the experience of industry reliability experts and highlights electronic failures due to technology changes, changing supply chain, and mitigation methods from a design, component, and process perspective. Tutorials that specifically address connectors, Commercial Off the Shelf (COTS) parts, identify issues and implement Design for Manufacturing (DfM) methodologies, root causes and mitigation strategies for Electrical overstress (EOS) failures, will comprise the series.
Reliability Challenges with the Use of Multilayer Ceramic Chip Capacitors
Abstract: The multilayer ceramic capacitor (MLCC) has become a widely used electronics component. The MLCC technologies have gone through several material and process changes such as the shift from precious metal electrode (PME) configurations which were predominantly silver/palladium to base metal electrodes (BME) dominated by nickel. The MLCC industry is now in the midst of an unprecedented set of challenges similar to the Moore’s Law challenges being faced by the semiconductor industry. Critical changes have included decreasing voltages and increasing layer count resulted in both quality and reliability problems. This has resulted in failure modes such as dielectric breakdown and oxygen vacancy migration. This tutorial will discuss common failures, root cause, and mitigation methods involving supplier selection and qualification.
Target audience: Engineers/managers involved in the design, manufacturing and/or reliability of electronic products/systems, and printed circuit board assemblies.
Benefits of Attending:
- How to avoid common mistakes in the use of MLCCs
- Mitigation methods for the relevant MLCC failure modes
- Keywords/Hashtags: Electronic reliability, Multilayer ceramic chip capacitor (MLCC), failure modes and mechanisms
Register!
Bio: Dock Brown, CRE
Dock Brown brings his more than 30 years of electronics reliability experience to clients of Ansys. Prior to joining Ansys, he spent 20 years at Medtronic where he most recently concentrated on cross business unit implementation of reliability initiatives for Class III medical devices. He was also responsible for supplier assessment and approval, on-going supplier audits, failure analysis, corrective actions, MRB, sampling, and ultimately full accountability for quality and reliability of COTS and custom parts and assemblies from a worldwide supplier base. Earlier in his career, Mr. Brown also spent time at Sundstrand Data Control where he led the implementation of the Boeing AQS program and with Olin Aerospace.
As a volunteer, he has been involved with ASQ, IEEE, IPC, and SMTA. He was the keynote speaker at the SMTA Cleaning Conference. He has taught design for reliability, tin whiskers, statistics, design of experiments, and contributed to standards development. He has won the SMTA Distinguished Speaker award and the SMTA Microelectronics Conference Best Paper award.
How to Avoid Common Failures with Connectors in Electronic Assemblies
Abstract: Performance enhancements and feature shrinkage in electronics have enabled explosive growth in the areas of Internet of Things (IOT) grow and wearable electronics. Connectors provide the critical function of communication between devices and as well as providing. As critical as they are, separable connectors are often the first item to fail in electronics. This problem is worse for electronics in challenging environments like automotive, as well as increased regulatory requirements in certain industries like medical and industrial. Therefore, the risk of connector failures increases in these applications. This tutorial will discuss connector failures, details of contact physics, contact plating options, normal force requirements and general tradeoffs that frequently occur when designing or selecting a connector for an application. Design guidance on how to prevent connector failures will be provided in this tutorial.
Target audience: Engineers/managers involved in the design, manufacturing and/or reliability of electronic products/systems, and printed circuit board assemblies.
Benefits of attending:
- How to avoid common mistakes in connector design and applications
- Mitigation methods for the relevant failure modes for connectors
- Keywords/Hashtags: Electronic reliability, Connectors, Connector failure modes and mechanisms, electronic component failures
Register!
Bio: Dock Brown, CRE
Dock Brown brings his more than 30 years of electronics reliability experience to clients of Ansys. Prior to joining Ansys, he spent 20 years at Medtronic where he most recently concentrated on cross business unit implementation of reliability initiatives for Class III medical devices. He was also responsible for supplier assessment and approval, on-going supplier audits, failure analysis, corrective actions, MRB, sampling, and ultimately full accountability for quality and reliability of COTS and custom parts and assemblies from a worldwide supplier base. Earlier in his career, Mr. Brown also spent time at Sundstrand Data Control where he led the implementation of the Boeing AQS program and with Olin Aerospace.
As a volunteer, he has been involved with ASQ, IEEE, IPC, and SMTA. He was the keynote speaker at the SMTA Cleaning Conference. He has taught design for reliability, tin whiskers, statistics, design of experiments, and contributed to standards development. He has won the SMTA Distinguished Speaker award and the SMTA Microelectronics Conference Best Paper award.
How to Ensure Reliability with Commercial Off the Shelf (COTS) Electronic Parts
Abstract: In recent decades as the industry has moved away from vertical integration to a geographically diffuse and disconnected electronic supply chain, maintaining quality control over supplier practices has been challenging. Cost constraints have resulted in the use of Commercial Off the Shelf (COTS) electronic components in several high reliability industry verticals such as aerospace, medical and defense for many years now. Navigating the supply chain in trying to meet high reliability standards has been challenging.
In this tutorial, several case studies will serve as examples to demonstrate what can go wrong in using off the shelf components. Risk assessments and management practices that companies can use to mitigate and control the technical, business and supply chain risks associated with COTS components in the electronic supply chain, will be discussed. Sourcing, qualification, product support, and roadmap lifecycle decisions the component suppliers make, will be discussed.
Target audience: Engineers/managers involved in the design, manufacturing and/or reliability of electronic products/systems, and printed circuit board assemblies.
Benefits of attending:
- How to avoid common mistakes in use of COTS components
- Mitigation methods for the relevant failure modes in the use of COTS components
- Keywords/Hashtags: Electronic reliability, MLCC, failure modes and mechanisms
Register!
Bio: Dock Brown, CRE
Dock Brown brings his more than 30 years of electronics reliability experience to clients of Ansys. Prior to joining Ansys, he spent 20 years at Medtronic where he most recently concentrated on cross business unit implementation of reliability initiatives for Class III medical devices. He was also responsible for supplier assessment and approval, on-going supplier audits, failure analysis, corrective actions, MRB, sampling, and ultimately full accountability for quality and reliability of COTS and custom parts and assemblies from a worldwide supplier base. Earlier in his career, Mr. Brown also spent time at Sundstrand Data Control where he led the implementation of the Boeing AQS program and with Olin Aerospace.
As a volunteer, he has been involved with ASQ, IEEE, IPC, and SMTA. He was the keynote speaker at the SMTA Cleaning Conference. He has taught design for reliability, tin whiskers, statistics, design of experiments, and contributed to standards development. He has won the SMTA Distinguished Speaker award and the SMTA Microelectronics Conference Best Paper award.
Design for Manufacturability (DfM) – Optimizing the Board Assembly Process for Reliability
Abstract: In the electronics industry, the quality and reliability of any product is highly dependent upon the capability of the manufacturing supplier, regardless of whether it is an internal operation or a CM (contract manufacturer). Manufacturing issues are one of the top reasons that companies fail to meet warranty expectations, which can result in severe financial pain and eventual loss of market share. Engineers and managers need to recognize that both manufacturing processes and design play a critical role in the success or failure of product development.
Designing printed boards today is more difficult than ever before because of the higher lead-free process temperature requirements and associated changes required in manufacturing. The density of the electronic assembly has increased, which has driven the industry to smaller and smaller components increasing the reliability risks.
The course will identify industry standards that help facilitate design for manufacturability (DfM), discuss the root cause analysis process for identifying issues, look at components from the perspective of manufacturing, similarly look at printed circuit boards and how to mitigate issues associated with laminate and pre-preg selection, circuit board cleanliness and ECM (electro-chemical migration), pad cratering and will finally examine the impact of solder on the reliability of the manufactured electronics.
Target audience: Engineers and managers involved in the design, manufacturing and/or reliability of complex printed circuit board assemblies.
Benefits of attending:
- Gain an understanding of different failure modes, associated with manufacturing
- Learn the process for assessing the design and enhance manufacturability with each level of electronic packaging/assembly
- Mitigation methods for the relevant failure modes
- Keywords/Hashtags: Electronic reliability, printed circuit board, failure modes and mechanisms, electronic packaging, reliability physics
Register!
Bio: Greg Caswell
Greg Caswell, a Lead Consulting Engineer for Ansys Corporation, is an industry recognized expert in the fields of SMT, advanced packaging, printed board fabrication, circuit card assembly, and bonding solutions using nanotechnology. He has been well-regarded as a leader in the electronics contract manufacturing and component packaging industries for the past 50 years. He has presented over 270 papers at conferences all over the world and has taught courses at IMAPS, SMTA and IPC events. He helped design the 1st pick and place system used exclusively for SMT in 1978, edited and co-authored the 1st book on SMT in 1984 for ISHM and built the 1st SMT electronics launched into space. Be on the lookout for his new book entitled Design for Excellence in Electronics Manufacturing due out in May 2021. Greg has won several awards including the IMAPS Lifetime Achievement Award in 2018, the ISHM Daniel C. Hughes Award (highest award given to an individual), ISHM Fellow of the Society Award and the Tracor Technical Innovation Award.
Bio: David Spitz
David Spitz, a Lead Consulting Engineer with Ansys Corporation, has over 30 years of experience in PCBA manufacturing with tier 1 contract manufacturers Texas Instruments, Solectron, and Flex. During that time, he has held various technical leadership roles including SMT and DFM Engineering, and his background has encompassed both NPI and Production environments. David has expertise in BGA/CSP attachment, solder paste printing, and SMT reflow soldering.
Why Electrical Overstress Ranks High in the IC Field Failure Pareto
Abstract: The semiconductor industry has witnessed steady growth over the last few years thanks to emerging applications, which are driving the growth of major semiconductor components. Reliable operation of these components is very important in any given application and in order to ensure reliability component parts must receive extensive testing and burn-in. Despite this, integrated circuit (IC) failures are still inevitable.
One of the common failure mechanisms that affects all IC components irrespective of the type of application is electrical overstress (EOS). EOS can affect components without warning, and when EOS does happen, the damage is done, and the functionality cannot be recovered. This often results in significant impact to consumers of ICs in the entire supply chain, raising concerns about the root cause of failure, reliability of other fielded components and increased costs.
In this webinar, we will discuss the possible root causes of EOS failures, why it ranks high in the failure pareto, and ways to mitigate EOS failure risks.
Target audience: Engineers involved in the design, manufacturing and/or reliability of complex printed circuit board assemblies.
Benefits of attending:
- Learn about the impact of Electrical Overstress (EOS) on semiconductor devices
- Learn about the Impact of Absolute Maximum Rating (AMR) on EOS failures
- Root Causes of EOS failure mechanisms
- Mitigation methods for the relevant failure modes
Keywords/Hashtags: Electrical Overstress (EOS), Electrostatic discharge (ESD), Electronics reliability, failure modes and mechanisms, transient Absolute Maximum Rating (tAMR)
Register!
Bio: Ashok Alagappan
Ashok Alagappan has 15 years of experience in the Semiconductor industry, specializing in design and manufacturing of semiconductor products. He has managed products through their life cycle, from introduction in the Fab to qualification. At Ansys, he is working with customers across the spectrum, from aerospace, automotive to commercial, providing expert analysis and recommendations for defining and improving reliability of electronic products and IC components. He has developed an IC wear out tool to predict the lifetime characteristics of Integrated Circuit components in high reliability applications like aerospace, defense, automotive, among others. He has built models to characterize the intrinsic wear out failure mechanisms of ICs and has implemented the tool in the Ansys Sherlock ADA™ software product.