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Electronics Reliability Tutorial Program
Series 5: Reliability Testing
Series 5 consists of two tutorials.
This series focuses on reliability and qualification testing of electronic components along with board and system level reliability affects. Accelerated testing concepts will be reviewed.
Incidentals:
- These tutorials are available on demand.
- You will have 180 days to access each tutorial.
- Registration:
- $70.00 for each 2-hour tutorial
- $120.00 for both tutorials in this series.
- Click here to re-direct to the registration page, where you will have the opportunity to select the courses you wish to attend.
Incidentals:
- Price: $70.00
- Duration: 2 hours
- Instructor: Jonathan Kordell
Abstract: This lecture will focus on using those fundamentals to develop validation tests based. TAKEAWAYS: 1) How to use accelerated life testing to predict product life in the field. 2) Understanding the differences between the different ALT test – ALT/HALT/HASS/BLRT 3) How to develop a reliability demonstration test.
Instructor: Jonathan Kordell
Dr. Jon Kordell, Ph.D Jonathan Kordell is a Senior Reliability Consulting Engineer at Ansys with 8 years of experience in electronic packaging reliability, accelerated testing and failure analysis. His current role is focused on the reliability of electronic devices in a range of environments via a combination of physical characterization and analytical modeling including finite element analysis. Jonathan received his PhD in mechanical engineering from the University of Maryland at the Center for Advanced Life Cycle Engineering (CALCE).
Incidentals:
- Price: $70.00
- Duration: 2 hours
- Instructors: Michael Blattau and Nick Kirsch
Abstract: Board Level Reliability Testing (BLRT) encompasses a range of environmental stress tests that evaluate the robustness of a semiconductor package once soldered to a printed circuit board (PCB). Solder joint reliability under thermal and mechanical loads has been the focus of BLRT programs, though increasingly other failure modes have also been identified for testing under these programs. While standards from organizations, such as JEDEC JEP150 and AEC Q104 (for automotive), provide guidance for BLRT testing, there is often ambiguity around test coupon design, test conditions, test duration, and failure criteria. This ambiguity can cause confusion, delay, and dissatisfaction up and down the supply chain.
Additionally, finite element modeling (FEM) is often underutilized in BLRT programs. Proactive simulation can be a helpful tool to design for reliability and improve overall BLRT robustness. This tutorial will cover tips for designing an appropriate BLRT program. This includes best practices in BLRT risk assessment, test coupon design, and experimental procedures. It will also review how to leverage simulation to improve BLRT design and performance.
Target audience: Engineers involved in the design, prototyping, qualification, or end use of new electronic package designs
Benefits of attending
- Learn about common failure modes and mechanisms of electronic package assemblies experienced and tested for in Printed Circuit Board Reliability Testing
- Learn about best practices for designing and conducting a board level reliability test program (BLRT)
- Learn how to use simulation to predict qualification test performance and reduce design cycles
Instructors: Michael Blattau and Nick Kirsch
Disclaimers
*These electronic reliability tutorials were originally presented between 2020 -2023. The fundamental concepts in electronics reliability, reliability physics, failure drivers are generally applicable to the industry. However there may be references to the technology node and packaging advancements at the time of the original tutorial, which may not reflect the most recent advancements.
**Greg Caswell and Dock Brown retired from Ansys after significant contributions to the electronics industry.