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Course:  

Modern FPGAs: Technology, Tools and Applications

Lecturers:

Organized by Prof. Andrzej Rucinski, University of New Hampshire;
With Guest Lectures By:
Clive “Max” Maxfield Editor Programmable Logic DesignLine www.PLdesignline.com;

Prof. Don Bouldin, University Tennessee, Knoxville

Prof. Jim Duckworth, Worcester Polytechnic Institute

Michael Bohm, CTO, AccelChip, Inc.

Glenn Steiner, Xilinx Advanced Products Division {tentative}

Ron Goodstein, First Shot Logic Simulation Design

Bob Zeidman, Zeidman Technologies, Inc.
Other Industry Experts

Dates:

7 - 9 PM; Thursdays, November 3, 10 & 17, December 1, 8 & 15

Location:

Holiday Inn Select, 15 Middlesex Canal Park Road, Woburn, MA

Intended Audience:

Practicing electrical engineers technical managers, business executives, electrical engineering and business students who are interested in the newest developments in FPGA technology, the wide range of applications and system-level trade-offs of FPGAs with ASICs.

Engineering managers exploring new technologies to extend existing Single Board and System Box designs, who are interested in, the potential impact of FPGAs on their business and how to capitalize on the state-of-the-art of semiconductor technology without the costs associated with full-custom-mask sets.

Benefits:

Opening keynote by Clive "Max" Maxfield, Editor, Programmable Logic DesignLine www.PLdesignline.com

Max Maxfield will provide an overview of the state-of-the art in FPGA space: where we are, where we’re going, and the driving forces that are taking us there!  Max will talk about (but will not limit himself to) technologies (new components and architectures), applications (a variety of different products and usage scenarios in which you may not expect to see FPGAs being used), design tools (from hardware accelerator generators to graph-based synthesis engines), and a variety of trends in the programmable logic arena.

Tutorial Introduction to VHDL and FPG
Jim Duckworth will provide a general introduction and overview of the VHDL language and FPGA architecture (concentrating on the Spartan 3 device and Spartan Starter board). Simple examples are used to show how the VHDL description is synthesized and downloaded to the board. The Verilog language will also be briefly introduced and compared to VHDL. A demo will show the complete process from VHDL entry, through simulation, synthesis, and finally downloading to the board (using the Xilinx ISE software).

Designing Electronic Systems with Reconfigurable Hardware
Don Bouldin will approach the problem of system design from the perspective of how speed and power requirements often dictate the use of dedicated hardware components instead of general-purpose processors.  Reprogrammable hardware components (commonly called field-programmable gate arrays or FPGAs) which contain digital logic and interconnect and occasionally analog circuitry are now capable of providing several million logic gates on a single chip with thousands of interconnection options. They can be reconfigured at runtime, enabling the same hardware resource to be reused depending on its interaction with external components, data dependencies or algorithm requirements.  Examples of applications which benefit from incorporating these components will be described.

Other industry speakers will concentrate on:

  • Novel Aspects of FPGA Technology

  • High Level Programming Tools

  • Specific Applications in Real-Time and Other High Performance Computation and Signal Processing

  • Personal Experience Applying Both ASICS and FPGAs to System Designs

Participants will receive a thorough introduction to FPGA and programmable logic device technology, hardware-level description language and the integrated higher-level development tools used with FPGAs, to create practical system-level designs. 

They also will gain an understanding from a business perspective of why this technology is revolutionizing signal processing and high performance interfaces.  Participants will be able to appreciate the cost-based trade-off between FPGAs and ASICS.

Some of the key Applications of FPGAs to be discussed include: high-performance data acquisition and recording, real-time digital signal processing, software radio, wireless base station, high performance computing

See http://www.ieeeboston.org/edu05s/2005fall/modern_fpgas.htm for real-time updated information, links, etc.

Background:

An understanding of basic electrical engineering concepts will be helpful.  Some experience with programming languages is also useful.

Handouts will be provided as part of the registration fee.

Course Outline:

November 3: Overview and Keynote

Prof. Andrzej Rucinski, University of New Hampshire

Clive “Max" Maxfield, Editor Programmable Logic DesignLine

 

November 10: Tutorial Introduction to VHDL and FPGAs

Prof. Jim Duckworth, Worcester Polytechnic Institute

Background to VHDL

Introduction to language

Programmable logic devices

CPLDs and FPGAs

FPGA architecture

Spartan 3 Starter Board

Using VHDL to synthesize and implement a design

Verilog overview

November 17: Designing Electronic Systems with Reconfigurable Hardware

Prof. Don Bouldin, University of Tennessee, Knoxville

Speed & power considerations

Prototyping

Run-time reconfiguration

Hardware re-use

Applications

December 1: Implementing Integrated Hardware/Software Projects With High Level Languages and Tools

[tentative] Glenn Steiner, Xilinx Advanced Products Division

Bob Zeidman, Zeidman Technologies -- Programmable systems on a chip {SOC}

 

December 8:   Programming an FPGA Using Matlab/Simulink

Michael Bohm, CTO, AccelChip, Inc.

[TBD] -- Business considerations, tradeoffs, systems issues

 

December 15: Developing Reconfigurable Hardware Signal Processors Using High Level GUI-based Tools

Dave Poulin, Annapolis Micro Systems

Ron Goodstein, First Shot Logic Simulation Design

Bios:

Clive "Max" Maxfield:

Max has now spent over a quarter of a century in the electronic, computing, and EDA arenas. In 1980, after obtaining his BSc in Control Engineering (an interesting mixture of math, electronics, mechanics, and hydraulics and fluids), Max joined a design team at International Computers Limited (ICL) creating CPUs for mainframe computers. In addition to designing ASICs and circuit boards, Max has created models of everything from ASIC cell libraries to microprocessors. Due to his digital expertise, Max was once appointed analog marketing manager at a large EDA company (the world is a funny old place sometimes).

 Max has written or co-authored several books including: Bebop to the Boolean Boogie (An Unconventional Guide to Electronics); EDA: Where Electronics Begins; The Design Warrior's Guide to FPGAs; and How Computers Do Math (Featuring the Virtual DIY Calculator). Max can be contacted at: max@TechBites.com

Dr. Don Bouldin

Don has been a Professor of Electrical and Computer Engineering at the University of Tennessee for 30 years. He received his degrees from Vanderbilt University and Georgia Tech. He has served as Editor-in-Chief of the IEEE Transactions on VLSI Systems and has been recognized as a Fellow of the IEEE for contributions to the design of special-purpose architectures using VLSI processors. He has been involved with numerous conferences and workshops on microelectronic systems and education. Prof. Bouldin can be contacted at: dbouldin@tennessee.edu

http://www.ece.utk.edu

Dr. R James Duckworth

Dr R James Duckworth is an Associate Professor in the Electrical and Computer Engineering Department at WPI. He obtained his PhD in parallel processing from the University of Nottingham in England. He joined WPI in 1987. Duckworth teaches undergraduate and graduate courses in computer engineering focusing on microprocessor and digital system design including using VHDL and Verilog for synthesis and modeling. His main research area is embedded system design. He is a senior member of the IEEE, and a member of the IEE, ION, and BCS. He can be reached at rjduck@wpi.edu

REAP THE BENEFITS

Join your peers and learn about:

  • FPGA’s Current and Future Technology and Performance

  • Designing with FGAs

  • Software Development Tools and Workflow

  • Applications:

    • Video

    • Compression

    • Video on demand

      • Video phones

      • HDTV

    • General Computing

      • Internet packet handling

      • Embedded computing

    • Scientific Computing

      • Image processing

      • Reconfigurable processing

    • Communication

      • Wireless Internet

      • Broadband

      • VoIP

Modern FPGAs: Technology, Tools and Applications is sponsoProgrammable Logic Desing Line LogoEE Times logored in part by EE Times (www.EEtimes.com) and Programmable Logic DesignLine (www.PLdesignline.com). For thirty years, EE Times has been the electronics industry newspaper of record. For more than 150,000 design and development engineers and technical managers, EE Times is a "must read" each week. www.PLdesignline.com  is the website for real solutions to tough programmable logic design challenges and the place for practical how-to information needed to program, develop, and implement field programmable gate arrays (FPGAs) and programmable logic devices (PLDs) in wireless, networking, industrial, automotive, and other design applications.

Course Fee Schedule:

REGISTRATION RECEIVED BY
October 24, 2005

REGISTRATION. RECEIVED AFTER
October 24, 2005

IEEE MEMBERS $350

IEEE MEMBERS $425

NON-MEMBERS $425

NON-MEMBERS $450

On-line Registration and Payment

On-line registration is closed for this course, but registration is still available on-site or by contacting the office at 781-245-5405

Copyright © 2004 IEEE Boston Section. All rights reserved.
Maintained by R M Stelting

Updated Thursday June 28, 2007